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/Title (CAT1021, CAT1022, CAT1023 - Supervisory Circuits with EEPROM Serial 2k-bit I2C Manual Reset and Watchdog Timer)
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Acrobat Distiller 18.0 (Windows)
BroadVision, Inc.
2018-05-22T12:37:47+02:00
2018-05-22T12:27:11+02:00
2018-05-22T12:37:47+02:00
application/pdf
CAT1021, CAT1022, CAT1023 - Supervisory Circuits with EEPROM Serial 2k-bit I2C Manual Reset and Watchdog Timer
zbfrmy
The CAT1021, CAT1022 and CAT1023 are complete memory and supervisory solutions for microcontroller-based systems. A EEPROM Serial 2k-bit I2C memory and a system power supervisor with brown-out protection are integrated together in low power CMOS technology. Memory interface is via a 400 kHz I2C bus.
The CAT1021 and CAT1023 provide a precision VCC sense circuit and two open drain outputs: one (RESET) drives high and the other (RESET) drives low whenever VCC falls below the reset threshold voltage. The CAT1022 has only a RESET output and does not have a Write Protect input. The CAT1021 also has a Write Protect input (WP). Write operations are disabled if WP is connected to a logic high.
All supervisors have a 1.6 second watchdog timer circuit that resets a system to a known state if software or a hardware glitch halts or “hangs" the system. For the CAT1021 and CAT1022, the watchdog timer monitors the SDA signal. The CAT1023 has a separate watchdog timer interrupt input pin, WDI.
The power supply monitor and reset circuit protect memory and system controllers during power up/down and against brownout conditions. Five reset threshold voltages support 5 V, 3.3 V and 3 V systems. If power supply voltages are out of tolerance reset signals become active, preventing the system microcontroller, ASIC or peripherals from operating. Reset signals become inactive typically 200 ms after the supply voltage exceeds the reset threshold level. With both active high and low reset signals, interface to microcontrollers and other ICs is simple. In addition, the RESET pin or a separate input, MR, can be used as an input for push-button manual reset capability.
The on-chip, 2k-bit EEPROM memory features a 16-byte page. In addition, hardware data protection is provided by a VCC sense circuit that prevents writes to memory whenever VCC falls below the reset threshold or until VCC reaches the reset threshold during power up.
Available packages include an surface mount 8-pin SOIC, 8-pin TSSOP, 8-pin TDFN and 8-pin MSOP packages. The TDFN package thickness is 0.8 mm maximum. TDFN footprint options are 3 x 3 mm.
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